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How to reduce the costs of fine-line PCBs

Eurocircuits News and PR from Eurocircuits - Published 29 April 2016 Our customers regularly call us to say that they have laid out a PCB with fine-pitch BGAs.
In this section we will show you how the right component placement and routing can reduce the cost of 10 4-layer BGA PCBs from 740€ to 233€, and deliver a more robust finished product.

Our customers regularly call us to say that they have laid out a PCB with fine-pitch BGAs. The layout looked OK in EAGLE, but when they uploaded the data onto our website they got a message that there were too many DRC errors so we couldnÂ’t produce the board, or, if we could, only at a higher price.

What has gone wrong?

Most designers start their layout using the PCB manufacturerÂ’s standard specification for the smallest standard track and isolation widths and the smallest drill sizes. For Eurocircuits these are:

Example:

- 150 µm Track/Gap and 0,25mm Drill End-diameter

- Or for a small but affordable extra charge 125 µm Track/Gap und 0,15 Drill End-diameter

So the designer typically uses the smallest standard drill size, 0.25 mm, for the via holes, routes the tracks in accordance with the standard DRC values and makes sure that tracks are centered between pads.

The results on screen looks OK. So the designer uploads his data right away into the online data checker, PCB Visualizer, but then he finds that there are errors everywhere. He can start to work his way through the list but will soon find that it is nearly impossible to solve all errors. The only solution is to change to a more expensive service.

Typical results for a BGA PCB in PCB Visualizer are:

If the designer accepts the violations, the PCB classification changes to class 9E. The outer/inner layer annular rings (restrings) are so small that he has to reduce the final hole size from 0.25 mm to 0.1mm. Similarly the isolation distances are too small, so he must decrease the minimum track width. We can still make the board, but the price has increased to:

What is the problem?

The designer has not noticed that his components are placed off-grid. Tracks can only be routed on grid so they will automatically snap to grid, causing spacing violations. If the designer doesnÂ’t run a DRC before he uploads his data he is unlikely to spot the violations.

In short:

The component grid and the layout grid do not match
No account has been taken of component geometry.
"So how do I place and route my BGAs to avoid these issues? I want my design to go through PCB Visualizer and DRC Check without any errors and without having to use a more expensive service."

First, set the right grid

When you switch from Schematic to Layout the layout grid is set as standard to 0.5 inch. The first step is to check your components. If the finest component is on a metric grid then select mm grid. Then set the grid value. In our example we are using a BGA with 0.8mm pitch, so set the matching grid in EAGLE to 0.2mm.
TIP

Always set a grid value that is a half or quarter of the component grid.

Summary:

Tip 1: Set up the grid in Layout to match the BGA

To avoid spacing errors set the right grid in Layout. A good value is a hal
see the full article here: www.eurocircuits.com/blog/225-How-to-reduce-the-costs-of-fine-lin

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